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Thunderbolt = Light Peak = Mini DisplayPort + PCI Express
2011/03/14 17:02:20瀏覽2127|回應0|推薦0

Refer to http://blog.fosketts.net/2011/02/24/thunderbolt-light-peak-pci-express/

Posted on Feb 24, 2011 by Stephen 

Thunderbolt Series

Apple unveiled their new line of MacBook Pro laptops today, complete with “Thunderbolt”, the trade name for a production packaging of Light Peak and Mini DisplayPort. After much speculation (including quite a bit by yours truly), we finally have some concrete information about Light Peak, and perhaps a peek (if you forgive the pun) into the next generation of I/O technologies!

Note: The following comes from my own research on the day of the launch. Intel’s Thunderbolt Technology Brief is especially helpful, and many of these images come from there. Intel has promised to brief me on the technology shortly, and I will write a more complete and correct article at that time!

PCI Express At Heart

We have long known that Light Peak is more a transport than a protocol. Rather than competing with existing standards like USB and FireWire, Light Peak is an interconnect that can carry a variety of protocols. But we never knew exactly how this mechanism would work until now.

Apple’s and Intel’s Thunderbolt pages reveal that it uses PCI Express as its base transport mechanism. This isn’t the first time the serial PCI Express bus has been exposed to the “outside world” – the weakly-supported ExpressCard standard already includes a single PCI Express (v1) lane for plug-in cards.

But Thunderbolt is much, much faster than ExpressCard. With a confirmed 10 Gb/s of throughput, Thunderbolt is a significant upgrade, but what exactly is the technology behind it? Intel could have used four PCI Express v1 lanes, but this would fall short of 10 Gb/s in real-world throughput thanks to 8b/10b encoding losses and other overhead, and would also pose additional cabling challenges. It could also have specified a single PCI Express v3.0 lane, which would spec nicely to 10 Gb/s, but this standard is quite new, having been finalized in November, 2010.

Instead, it appears that Thunderbolt will use two PCI Express v2.0 lanes, each operating at 5 GHz and using 8b/10b encoding. This means that real-world Light Peak throughput will be limited to about 2x 4 Gb/s, 20% less than the rated number. But this scheme would be much simpler to implement, being compatible with Intel’s current Sandy Bridge CPUs and chipsets as well as nearly every existing PCI Express-capable chip and peripheral.

Thunderbolt = Light Peak Over Mini DisplayPort

Intel’s Thunderbolt port is not just a renaming of Light Peak, though. It is a packaging of Light Peak technology with Apple’s Mini DisplayPort (mDP) video connector standard. Note that the Thunderbolt name and logo are Intel’s trademarks, not Apple’s, and will likely show up on PC hardware as well.

Mini DisplayPort is a compact 20-pin connector for the DisplayPort digital video interface standard. Introduced in 2006, DisplayPort is intended to replace DVI and VGA (and supplant HDMI) for use in computer displays. DisplayPort gained significant traction in late 2010 as major PC component and display manufacturers like AMD, Intel, Dell, Lenovo, LG, and Samsung announced they would use it both internally and externally for future displays.

Apple switched to DisplayPort in late 2008, and has exclusively used Mini DisplayPort since 2009. They released the compact mDP specification for free use by other manufacturers, and support for the standard is growing.

Maintaining Compatibility With Mini DisplayPort

Although it is not 100% clear exactly how Intel added Light Peak PCI Express lanes to the Mini DisplayPort connector, we do have a general idea.

All 20 pins in the mDP connector are already used for the DisplayPort video and associated data signals, leaving none for PCI Express. Although the mechanical tolerances of a mDP connector are better-suited for an optical interconnect, and Thunderbolt does hold out the promise of optical connections, the initial Thunderbolt implementation uses electrical signals to carry PCI Express data.

Intel’s illustration appears to show PCI Express and DisplayPort data multiplexed over a single connection. But this would be tricky to implement while still maintaining backwards-compatibility with existing Mini DisplayPort devices, as touted.

Intel accomplished this bit of magic by only multiplexing when compatible endpoints are detected:

“if a DisplayPort device is detected, a Thunderbolt controller will drive compatibility mode DisplayPort signals to that device”

They re-use the existing pins for a multiplexed connection of PCI Express and DisplayPort data for Thunderbolt-capable endpoints but fall back only to Mini DisplayPort signaling when a mDP device is detected. This likely means that the PCI Express lanes will be entirely disabled when connected to an existing Apple Cinema Display or other Mini DisplayPort device.

One Big Surprise: Two Channels!

There is one more surprise in store from Intel and Apple:

“A Thunderbolt connector is capable of providing two full-duplex channels. Each channel provides bi-directional 10 Gbps of bandwidth.”

Whoa there! So this little Mini DisplayPort connector includes 20 Gb/s of throughput in each direction, plus up to two DisplayPort v1.1a connections with 8.64 Gb/s each. This yields a grand total of 57 Gb/s over that slim wire. That’s one impressive interconnect!

 

Intel's Thunderbolt Controller diagram is revealing!

The Intel Thunderbolt controller is fed four PCI Express v2.0 lanes and a DisplayPort signal from the “Cougar Point” platform controller hub (PCH). A DisplayPort signal can also be routed in from a discrete graphics card. Each Thunderbolt controller can apparently drive two Thunderbolt connectors, though it is likely that these will share the same four PCI Express lanes using a crossbar switch built into the controller.

A Wide World of Peripherals

 

LaCie stands make a big splash with Thunderbolt-compatible storage devices

As mentioned, just about any existing PCI Express chipset can reside on this Thunderbolt bus, and the topology is extremely flexible. A Thunderbolt peripheral could be an endpoint, using the PCI Express lanes to drive FireWire, USB, Fibre Channel, or just about any other interconnect. It could also be a hub, allowing further Thunderbolt connections, or a pass-through in a daisy-chain topology.

It is somewhat surprising that Apple did not release a new Thunderbolt-capable Cinema Display today. In fact, only storage devices from Promise and LaCie are noted in Apple’s page. They do promise a user can “daisy-chain up to six new peripherals, such as the Promise Pegasus RAID or LaCie Little Big Disk, or five peripherals and an Apple LED Cinema Display.” But this indicates that the Cinema Display would be at the end of the chain operating in Mini DisplayPort compatibility mode.

It is likely that Intel is supplying the Thunderbolt chips used in peripherals as well. If Intel is the single source for these chips, it could drive up cost and reduce availability of compatible peripherals. But it would also likely improve interoperability and compatibility in general.

Stephen’s Stance

Although Thunderbolt is backward-compatible, only the forward-looking use cases are really compelling. A future Cinema Display with USB, FireWire, and Ethernet ports would be a start. It would be easy to imagine a slimmer MacBook with just a few internal ports that relies on its display to provide DVD, ExpressCard, and other expansion devices. I’d love to see a Thunderbolt- and Sandy Bridge-equipped MacBook Air!

It is disappointing that Apple and Intel decided to use the Mini DisplayPort connector rather than USB, but the USB Implementer’s Forum was apparently opposed to that idea. Since Apple controls mDP and modern Macs increasingly include just that connector and USB, it was an easy alternative choice. Although today’s MacBook Pros include just a single Thunderbolt port, one suspects that future machines might reduce the number of USB connectors or eliminate FireWire in favor of a second Thunderbolt.

This is an exciting development in I/O and storage. Watch this space for future updates!

Note: Images in this post come from Apple and Intel.

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