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Moore’s Law – Let’s go up instead of down!

In the semiconductor industry, chiplets are single silicon dies that are designed to be combined with other dies. These dies can be put together in different arrangements including vertical stacking, and then these are mounted onto a single substrate layer, which is then packaged. Interconnections between individual chiplets can be achieved in several ways, including bond wires and direct bonding using metallic via.

While Intel has not released the dollar figure for the program, the reasoning for Intel being chosen by the US military is well established. Currently, almost 75% of the worlds semiconductor devices are manufactured in Asia. With recent tensions between China and the US, there is an interest to move manufacture back to the US. This is also incredibly important in the military who want to ensure that their products are produced locally with a trusted supply chain. While many American companies can make semiconductors, Intel is only one of three that are capable of fabricating high-end chiplet based designs, with the other two being TSMC and Samsung; both of which are located in Asia.

What are chiplets?

Along with a 2.5M hours/55C MTBF rating, comprehensive protection and control features are supplied, including short-circuit immunity, over-temperature shutdown, and under-voltage lockout. At the same time, the part can be synchronised to an external clock and disabled with low standby current by using an ON/OFF control.

By Robin Mitchell | 22-12-2020

Why has the US military chosen Intel as its chip supplier?

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By Nnamdi Anyadike | 27-11-2018

However, the current scale of transistors, now at the sub 10nm scale, means that semiconductor foundries need to be incredibly clean with as little dust in the air as possible (as little as ten dust particles per cubic meter of air). This is because a dust particle landing on a 10nm transistor will not only damage that transistor, but it will affect the many thousands of transistors nearby as a result of the size of the dust particle (remember, dust particles are several orders of magnitude greater than 10nm transistors). The secondary issue that small transistors face is that individual point defects in a semiconductor can result in faulty transistors. Thus, a chip that has incredibly small transistors, of which require little to no point defects in the crystal structure, resulting in a high probability that the chip will fail. 

Intel's Recent Struggle and Competition

How “Chiplets” May Help the Future of Semiconductor Technology

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